View ML66517_300161.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

PEDL66517-03
Semiconductor 1 ML66517 Family
16-Bit Microcontroller
This version: Nov. 1999 Previous version: Aug. 1999
Preliminary
GENERAL DESCRIPTION
The ML66517 family of highly functional CMOS 16-bit single chip microcontrollers utilizes the nX-8/500S, Oki's proprietary CPU core. Each device includes capture input with an internal digital filter, 10-bit A/D converter, a number of timers, and dedicated 3-phase PWM (6 outputs) function capable of generating and controlling of AC/DC motor driving waveforms. By means of the internal dedicated function for motor control, this general-purpose microcontroller is optimally suited for DC and AC motor control applications for energy saving. And the internal hardware multiplier allows high-speed arithmetic operations to be executed. And also the internal clock multiplication circuit can reduce the source frequency noise so that high-speed operations can be performed. The flash ROM versions (ML66Q517 and ML66Q515) programmable with a single 5V power supply are also included in the family. These versions are easily adaptable to quick specification changes and to new product versions.
APPLICATIONS
Air conditioner or inverter control Motor control for FA equipment
ORDERING INFORMATION
Order Code or Product Name ML66514-RB ML66Q515-RB ML66517-GA ML66Q517-GA Package 80-pin plastic QFP (QFP 80-P-1420-0.80-BK) 64-pin plastic SDIP (SDIP 64-P-750-1.778) Remark 5 V mask ROM version 5 V flash ROM version 5 V mask ROM version MSM66517 flash ROM version
1/28
PEDL66517-03
1 Semiconductor
ML66517 Family
FEATURES
Name Operating temperature Power supply voltage/ Maximum frequency Minimum instruction execution time Internal ROM size (max. external) Internal RAM size (max. external) I/O ports 32 KB (64 KB) 1 KB (64 KB) 46 I/O pins (with pull-up resistors, programmable at the bit level), 4 input pins ML66514 -40C to 85C VDD = 4.5 to 5.5 V/f = 25 MHz 80 nsec @25 MHz 64 KB (128 KB) 2 KB (64 KB) 56 I/O pins (with pull-up resistors, programmable at the bit level), 8 input pins ML66517
16-bit free-running counter x 1ch Compare output/capture input x 2ch 16-bit timer (auto-reload/timer out) x 1ch 8-bit auto reload timer x 2ch Timers 8-bit auto reload timer x 4ch (can also be used as 16-bit auto reload timer x 1ch and 8-bit auto reload timer x 2ch)
Capture x 2ch 8-bit auto reload timer x 2ch (also functions as serial communication baud rate generators) 8-bit auto reload timer x 1ch (also functions as a watchdog timer) 8-bit PWM x 2ch (can also be used as 16-bit PWM x 1ch) Serial port A/D converter 3-phase PWM (AC motor control) 3-phase PWM (DC motor control) External interrupt Interrupt priority Others Flash ROM version Non-Maskable x 1ch Maskable x 2ch 3 levels Multiplexed address and data buses Multiplication calculator ML66Q515 (ROM = 64 KB, RAM = 2 KB) ML66Q517 10-bit x 4ch Available Available Non-Maskable x 1ch Maskable x 4ch 8-bit PWM x 4ch (can also be used as 16-bit PWM x 2ch) 10-bit x 8ch
Synchronous/UART x 2ch
2/28
PEDL66517-03
1 Semiconductor
ML66517 Family
SPECIAL FEATURES
1. High-performance CPU The family includes the high-performance CPU, powerful bit manipulation instruction set, full symmetrical addressing mode, and ROM WINDOW function, and also provides the best optimized C compiler support. 2. 3-phase PWM circuit for generating motor drive waveforms The device includes a 16-bit three-phase PWM (six outputs) circuit designed specifically for generating AC three-phase motor or DC three-phase brushless motor drive waveforms. PWM and level outputs can be switched by compare and match circuitry and software, and the compare and match circuitry can switch the outputs in real time. The device has circuitry to fix the three-phase outputs at an inactive level by inputting malfunction signals from a motor at the specific pin. 3. Capture inputs with digital filter filters The device has two channels of capture inputs with 3/4 digital filters. The device is best suited to event interval measurement, pulse width measurement, etc. in a high noise environment such as motor control. An optimum filter can be selected according to noise width since a sampling interval of an input signal can be selected. A digital filter OFF mode can also be selected. 4. High-speed multiplier The device includes a dedicated high-speed multiplier. The calculation time, 16 bits x 16 bits = 32 bits, is 200 ns (f = 25 MHz). 5. Clock multiplication circuit The device includes a clock multiplication circuit in which the clock can be selected as a source clock (PLL OFF), 1 x clock, 2 x clock, or 4 x clock. Therefore, the use of a low frequency oscillator (external clock) allows the device to internally operate at a high speed, which achieves noise reduction and lower power consumption. 6. Flash memory version programmable with a single power supply In addition to the mask ROM versions, the family includes the versions (ML66Q517 and ML66Q515) with 64 KB flash memory that can be programmed with a single 5 V supply. 7. A high-precision A/D converter The device has a high precision 10-bit A/D converter with eight channels. An independent result register for each channel provides easy accessibility by software. The A/D converter is activated in a channel select mode, and automatic conversion is also implemented in a scan mode which scans from any designated channel to the last channel (ch 7). 8. Programmable pull-up resistors Building the pull-up resistors into the chip contributes to overall design compactness. Making them programmable on a per-bit basis allows complete flexibility in circuit board layout and system design. These programmable pull-up resistors are available for all I/O pins not already assigned specific functions (such as the oscillator connection pins).
3/28
PEDL66517-03
1 Semiconductor
ML66517 Family
PWM output switching every 60 of motor turn using the compare-out timer
Compare register value setting CAP input Compare-match generation CAP input
PWM-U PWM-UB PWM-V PWM-VB PWM-W PWM-WB
PWM Output Timing (DC Motor Control)
Period register setting value
16-bit counter value
0000H Underflow counts up the counter PWM-U (U) PWM-UB (U)
Set by 8-bit dead-time timer (Only U and U output signals are indicated above)
PWM Output Timing (AC Motor Control)
4/28
PEDL66517-03
1 Semiconductor
ML66517 Family
BLOCK DIAGRAM
TM0OUT TM0EVT TM1OUT TM1EVT TM2OUT TM2EVT CLKOUT RXD1 TXD1 RXC1 TXC1 8-bit Timer4/BRG RXD6 TXD6 RXC6 TXC6 SIO1 (UART/SYNC) 16-bit Timer0
CPU Core OSC0 OSC1 CLKSEL0 CLKSEL1 Control Registers SSP ALU Control ACC LRB PSW PC RES
8-bit Timer1 8-bit Timer2 ALU System Control
Peripheral
TSR CSR
SIO6 (UART/SYNC) Memory Control Pointing Registers Local Registers Instruction Decoder
8-bit Timer3/BRG TM5EVT PWM0OUT PWM2OUT PWM1OUT PWM3OUT 8-bit PWM0 8-bit PWM1
8-bit Timer5 RAM 2K ROM 64K
EA PSEN ALE
Bus Port Control
RD WR
8-bit Timer9 INACT PWMU PWMUB PWMV PWMVB PWMW PWMWB
AD0 to AD7
A8 to A16 3-phase PWM TBC CMP 8-bit Timer6/WDT P0 P1 P2 P3 P5 P6 P7 P8 P10 P11 P12 P15 P16 P17
CAP/CMP 16-bit FRC
VREF AGND AI0 to AI7 NMI EXINT0 EXINT3
to
10-bit A/D Converter
Interrupt
ML66517/ML66Q517 Block Diagram
Port Control
CAPF0 CAPF1 CPCMF0 CPCMF1
CAP
5/28
PEDL66517-03
1 Semiconductor
ML66517 Family
TM0OUT TM0EVT CLKOUT RXD1 TXD1 RXC1 TXC1
16-bit Timer0
CPU Core OSC0 OSC1 CLKSEL0 CLKSEL1 Control Registers SSP PSW PC RES
Peripheral System Control SIO1 (UART/SYNC) ALU
8-bit Timer4/BRG RXD6 TXD6 RXC6 TXC6
ALU Control ACC
LRB
SIO6 (UART/SYNC)
8-bit Timer3/BRG
8-bit Timer5
Memory Control Pointing Registers Local Registers
Instruction Decoder
PWM0OUT PWM1OUT
8-bit PWM0 8-bit PWM1
*1 *2
EA ROM 32K/64K
Bus Port Control
RAM 1K/2K
PSEN ALE RD WR
8-bit Timer9 INACT PWMU PWMUB PWMV PWMVB PWMW PWMWB
3-phase PWM
AD0 to AD7
A8 to A15 CMP
CAPF0 CAPF1 CPCMF0 CPCMF1
CAP CAP/CMP
TBC P0 P1 P3 P5 P6 P7 P8 P11 P12 P15 P16 P17
8-bit Timer6/WDT
V REF AGND AI4 to AI7 NMI EXINT0 EXINT1
to
10-bit A/D Converter
Interrupt
*1 ML66Q515 has 2KB RAM, ML66514 has 1KB RAM *2 ML66Q515 has 64KB ROM, ML66514 has 32KB ROM
ML66Q515/ML66514 Block Diagram
Port Control
16-bit FRC
6/28
PEDL66517-03
1 Semiconductor
ML66517 Family
PIN CONFIGURATION (TOP VIEW)
80 RXD1/P8-0 TXD1/P8-1 RXC1/P8-2 TXC1/P8-3 PWM2OUT/P8-6 PWM3OUT/P8-7 PWM0OUT/P7-6 PWM1OUT/P7-7 VDD GND PWMU/P16-0 PWMUB/P16-1 PWMV/P16-2 PWMVB/P16-3 PWMW/P16-4 PWMWB/P16-5 INACT/P16-6 NMI CAPF0/P17-0 CAPF1/P17-1 CPCMF0/P17-2 CPCMF1/P17-3 EXINT0/P6-0 EXINT1/P6-1 1
TXC6/P15-3 RXC6/P15-2 TXD6/P15-1 RXD6/P15-0 GND AGND AI7/P12-7 AI6/P12-6 AI5/P12-5 AI4/P12-4 AI3/P12-3 AI2/P12-2 AI1/P12-1 AI0/P12-0 VREF VDD
75 70 65 P2-0/A16 P1-7/A15 P1-6/A14 P1-5/A13 P1-4/A12 P1-3/A11 P1-2/A10 P1-1/A9 P1-0/A8 GND P3-3/WR P3-2/RD P3-1/PSEN P3-0/ALE P0-7/AD7 P0-6/AD6 P0-5/AD5 P0-4/AD4 P0-3/AD3 P0-2/AD2 P0-1/AD1 P0-0/AD0 EA RES 5 60 10 55 15 50 20 45 25 30 35 40
P6-2/EXINT2 P6-3/EXINT3 P6-4/TM1EVT P6-5/TM1OUT P6-6/TM2EVT P6-7/TM2OUT P5-6/TM0OUT P5-7/TM0EVT P10-7/TM5EVT P11-2/CLKOUT GND OSC0 OSC1 VDD
80-Pin Plastic QFP ML66517/ML66Q517 Pin Configuration
CLKSEL0 CLKSEL1
7/28
PEDL66517-03
1 Semiconductor
ML66517 Family
64 RXD1/P8-0 TXD1/P8-1 RXC1/P8-2 TXC1/P8-3 PWM0OUT/P7-6 PWM1OUT/P7-7 PWMU/P16-0 PWMUB/P16-1 PWMV/P16-2 PWMVB/P16-3 PWMW/P16-4 PWMWB/P16-5 INACT/P16-6 NMI CAPF0/P17-0 CAPF1/P17-1 1
TXC6/P15-3 RXC6/P15-2 TXD6/P15-1 RXD6/P15-0 GND AGND AI7/P12-7 AI6/P12-6 AI5/P12-5 AI4/P12-4 VREF VDD A15/P1-7 A14/P1-6 A13/P1-5 A12/P1-4
60 49 48
10
40
33 17 30
P1-3/A11 P1-2/A10 P1-1/A9 P1-0/A8 GND P3-3/WR P3-2/RD P3-1/PSEN P3-0/ALE P0-7/AD7 P0-6/AD6 P0-5/AD5 P0-4/AD4 P0-3/AD3 P0-2/AD2 P0-1/AD1
ML66Q515/ML66514 Pin Configuration
P17-2/CPCMF0 P17-3/CPCMF1 P6-0/EXINT0 P6-1/EXINT1 P5-6/TM0OUT P5-7/TM0EVT P11-2/CLKOUT GND OSC0 OSC1 VDD CLKSEL0 CLKSEL1 RES EA P0-0/AD0
64-Pin Plastic QFP
8/28
PEDL66517-03
1 Semiconductor
ML66517 Family
PSEN/P3-1 RD/P3-2 WR/P3-3 GND A8/P1-0 A9/P1-1 A10/P1-2 A11/P1-3 A12/P1-4 A13/P1-5 A14/P1-6 A15/P1-7 VDD VREF AI4/P12-4 AI5/P12-5 AI6/P12-6 AI7/P12-7 AGND GND RXD6/P15-0 TXD6/P15-1 RXC6/P15-2 TXC6/P15-3 RXD1/P8-0 TXD1/P8-1 RXC1/P8-2 TXC1/P8-3 PWM0OUT/P7-6 PWM1OUT/P7-7 PWMU/P16-0 PWMUB/P16-1
64-Pin Plastic SDIP
P3-0/ALE P0-7/AD7 P0-6/AD6 P0-5/AD5 P0-4/AD4 P0-3/AD3 P0-2/AD2 P0-1/AD1 P0-0/AD0 EA RES CLKSEL1 CLKSEL0 VDD OSC1 OSC0 GND P11-2/CLKOUT P5-7/TM0EVT P5-6/TM0OUT P6-1/EXINT1 P6-0/EXINT0 P17-3/CPCMF1 P17-2/CPCMF0 P17-1/CAPF1 P17-0/CAPF0 NMI P16-6/INACT P16-5/PWMWB P16-4/PWMW P16-3/PWMVB P16-2/PWMV
ML66Q515/ML66514 Pin Configuration
9/28
PEDL66517-03
1 Semiconductor
ML66517 Family
PIN DESCRIPTIONS
In the Type column, "I" indicates an input pin, "O" indicates an output pin, and "I/O" indicates an I/O pin. ML66517/ML66Q517 Pin Descriptions
Description Function Symbol Type P0_0/AD0 to P0_7/AD7 P1_0/A8 to P1_7/A15 P2_0/A16 I/O Primary function
8-bit I/O port Pull-up resistors can be specified for each individual bit 8-bit I/O port Pull-up resistors can be specified for each individual bit 1-bit I/O port Pull-up resistors can be specified for each individual bit 4-bit I/O port 10 mA sink capability Pull-up resistors can be specified for each individual bit
Type I/O
Secondary function
External memory access Address output/data I/O port External memory access Address output port External memory access Address output port External memory access Address latch enable signal output pin External program memory access Read strobe output pin External memory access Read strobe output pin External memory access Write strobe output pin Timer 0 timer output pin Timer 0 external event input pin External interrupt 0 input pin External interrupt 1 input pin External interrupt 2 input pin External interrupt 3 input pin Timer 1 external event input pin Timer 1 timer output pin Timer 2 external event input pin Timer 2 timer output pin PWM0 output pin PWM1 output pin
I/O
O
I/O
O
P3_0/ALE
O
P3_1/PSEN
I/O
O
P3_2/RD Port P3_3/WR
P5_6/TM0OUT P5_7/TM0EVT 2-bit I/O port Pull-up resistors can be specified for each individual bit 8-bit I/O port Pull-up resistors can be specified for each individual bit
O O O I I I I I I O I O I/O
2-bit I/O port Pull-up resistors can be specified for each individual bit
I/O
P6_0/EXINT0 P6_1/EXINT1 P6_2/EXINT2 P6_3/EXINT3 P6_4/TM1EVT P6_5/TM1OUT P6_6/TM2EVT P6_7/TM2OUT P7_6/PWM0OUT P7_7PWM1OUT I/O
O O
10/28
PEDL66517-03
1 Semiconductor
ML66517 Family
ML66517/ML66Q517 Pin Descriptions (Continued)
Description Function Symbol Type P8_0/RXD1 P8_1/TXD1 P8_2/RXC1 P8_3/TXC1 P8_6/PWM2OUT P8_7PWM3OUT P10_7/TM5EVT I/O
1-bit I/O port Pull-up resistors can be specified 1-bit I/O port Pull-up resistors can be specified 8-bit input port 6-bit I/O port Pull-up resistors can be specified for each individual bit
Primary function Type I O I/O I/O O O I
Secondary function
SIO1 receive data input pin SIO1 transmit data output pin SIO1 receive clock I/O pin SIO1 transmit clock I/O pin PWM2 output pin PWM3 output pin Timer 5 external event input pin
I/O
Main clock pulse output pin
P11_2/CLKOUT P12_0/AI0 to P12_7/AI7 P15_0/RXD6 Port P15_1/TXD6 P15_2/RXC6 P15_3/TXC6 P16_0/PWMU P16_1/PWMUB P16_2/PWMV P16_3/PWMVB P16_4/PWMW P16_5/PWMWB P16_6/INACT P17_0/CAPF0 P17_1/CAPF1 P17_2/CPCMF0 P17_3/CPCMF1
I/O
O
A/D converter analog input port
I
4-bit I/O port Pull-up resistors can be
I I O I/O I/O
7-bit I/O port Pull-up resistors can be specified for each individual bit SIO6 receive data input pin SIO6 transmit data output pin SIO6 receive clock I/O pin SIO6 transmit clock I/O pin 3-phase PWMU output pin 3-phase PWMUB output pin 3-phase PWMV output pin 3-phase PWMVB output pin 3-phase PWMW output pin 3-phase PWMWB output pin Abnormality detect input pin Capture 0 input pin Capture 1 input pin Capture 0 input/compare 0 output pin Capture 1 input/compare 1 output pin
I/O
specified for each individual bit
O O O O O O I
I/O
4-bit I/O port Pull-up resistors can be specified for each individual bit
I I I/O I/O
I/O
11/28
PEDL66517-03
1 Semiconductor
ML66517 Family
ML66517/ML66Q517 Pin Descriptions (Continued)
Function Symbol VDD Power supply GND VREF AGND OSC0 Type I I I I I Description Power supply pin Connect all VDD pins to the power supply.* GND pin Connect all GND pins to GND.* Analog reference voltage pin Analog GND pin Main clock oscillation input pin Connect to a crystal or ceramic oscillator. Or, input an external clock. Main clock oscillation output pin Connect to a crystal or ceramic oscillator. The clock output is opposite in phase to OSC0. Leave this pin unconnected when an external clock is used. Clock multiplication factor select pin Clock multiplication factor is selected from source oscillation (PLL OFF), source oscillation x 2, or source oscillation x 4 Reset input pin Non-maskable interrupt input pin External program memory access input pin If the EA pin is enabled (low level), the internal program memory is masked and the CPU executes the program code in external program memory all address space.
Oscillation
OSC1
O
CLKSEL0 CLKSEL1 Reset RES NMI Others EA
I I I I
I
*
Each of the family devices has unique pattern routes for the internal power and ground. Connect the power supply voltage to all VDD pins and the ground potential to all GND pins. If a device may have one or more VDD or GND pins to which the power supply voltage or the ground potential is not connected, it can not be guaranteed for normal operation.
12/28
PEDL66517-03
1 Semiconductor
ML66517 Family
ML66Q515/ML66514 Pin Descriptions
Description Function Symbol Type P0_0/AD0 to P0_7/AD7 P1_0/A8 to P1_7/A15 P3_0/ALE I/O Primary function
8-bit I/O port Pull-up resistors can be specified for each individual bit 8-bit I/O port Pull-up resistors can be specified for each individual bit 4-bit I/O port 10mA sink capability Pull-up resistors can be specified for each individual bit
Type I/O
Secondary function
External memory access Address output/Data I/O port External memory access Address output port External memory access Address latch enable signal output pin External program memory access Read strobe output pin External memory access Read strobe output pin External memory access Write strobe output pin Timer 0 timer output pin Timer 0 external event input pin External interrupt 0 input pin External interrupt 1 input pin PWM0 output pin PWM1 output pin SIO1 receive data input pin SIO1 transmit data output pin SIO1 receive clock I/O pin SIO1 transmit clock I/O pin Main clock pulse output pin
I/O
O
O
P3_1/PSEN
I/O
O
P3_2/RD P3_3/WR P5_6/TIM0OUT P5_7/TIM0EVT Port P6_0/EXINT0 P6_1/EXINT1 P7_6/PWM0OUT P7_7/PWM1OUT P8_0/RXD1 P8_1/TXD1 P8_2/RXC1 P8_3/TXC1 P11_2/CLKOUT P12_4/AI4 to P12_7/AI7 P15_0/RXD6 P15_1/TXD6 P15_2/RXC6 P15_3/TXC6 I/O I/O
1-bit I/O port Pull-up resistors can be specified 2-bit I/O port Pull-up resistors can be specified for each individual bit 2-bit I/O port Pull-up resistors can be specified for each individual bit 2-bit I/O port Pull-up resistors can be specified for each individual bit 4-bit I/O port Pull-up resistors can be
O O O I I I O O I O I/O I/O O
I/O
I/O
I/O
I/O
specified for each individual bit
4-bit input port I
4-bit I/O port Pull-up resistors can be specified for each individual bit
A/D converter analog input port
I I O I/O I/O
SIO6 receive data input pin SIO6 transmit data output pin SIO6 receive clock I/O pin SIO6 transmit clock I/O pin
13/28
PEDL66517-03
1 Semiconductor
ML66517 Family
ML66Q515/ML66514 Pin Descriptions (Continued)
Description Function Symbol Type P16_0/PWMU P16_1/PWMUB P16_2/PWMV P16_3/PWMVB P16_4/PWMW P16_5/PWMWB Port P16_6/INACT P17_0/CAPF0 P17_1/CAPF1 P17_2/CPCMF0 P17_3/CPCMF1 I/O 4-bit I/O port Pull-up resistors can be specified for each individual bit I/O Primary function 7-bit I/O port Pull-up resistors can be specified for each individual bit Type O O O O O O I I I I/O I/O Secondary function 3-phase PWMU output pin 3-phase PWMUB output pin 3-phase PWMV output pin 3-phase PWMVB output pin 3-phase PWMW output pin 3-phase PWMWB output pin Abnormality detect input pin Capture 0 input pin Capture 1 input pin Capture 0 input/compare 0 output pin Capture 1 input/compare 1 output pin
14/28
PEDL66517-03
1 Semiconductor
ML66517 Family
ML66Q515/ML66514 Pin Descriptions (Continued)
Function Symbol VDD Power supply GND VREF AGND OSC0 Type I I I I I Description Power supply pin Connect all VDD pins to the power supply.* GND pin Connect all GND pins to GND.* Analog reference voltage pin Analog GND pin Main clock oscillation input pin Connect to a crystal or ceramic oscillator. Or, input an external clock. Main clock oscillation output pin Connect to a crystal or ceramic oscillator. The clock output is opposite in phase to OSC0. Leave this pin unconnected when an external clock is used. Clock multiplication factor select pin Clock multiplication factor is selected from source oscillation (PLL OFF), source oscillation x 2, or source oscillation x 4 Reset input pin Non-maskable interrupt input pin External program memory access input pin If the EA pin is enabled (low level), the internal program memory is masked and the CPU executes the program code in external program memory all address space.
Oscillation
OSC1
O
CLKSEL0 CLKSEL1 Reset RES NMI Others EA
I I I I
I
*
Each of the family devices has unique pattern routes for the internal power and ground. Connect the power supply voltage to all VDD pins and the ground potential to all GND pins. If a device may have one or more VDD or GND pins to which the power supply voltage or the ground potential is not connected, it can not be guaranteed for normal operation.
15/28
PEDL66517-03
1 Semiconductor
ML66517 Family
ABSOLUTE MAXIMUM RATINGS
Parameter Digital power supply voltage Input voltage Output voltage Analog reference voltage Analog input voltage Power dissipation Storage temperature Symbol VDD VI VO VREF VAI 80-pin QFP PD TSTG Ta = 85C per package 64-pin QFP 64-pin SDIP -- GND = AGND = 0 V Ta = 25C Condition Rating -0.3 to +7.0 -0.3 to VDD +0.3 -0.3 to VDD +0.3 -0.3 to VDD +0.3 -0.3 to VREF 600 520 1280 -50 to +150 C mW Unit V V V V V
RECOMMENDED OPERATING CONDITIONS
Parameter Digital power supply voltage Analog reference voltage Analog input voltage Memory hold voltage Internal operating frequency Ambient temperature Symbol VDD VREF VAI VDDH fOSC Ta Condition fOSC 25 MHz -- -- fOSC = 0 Hz PLL (multiplier) OFF PLL (multiplier) ON -- MOS load P3 Fan out N P0, P16 TTL load P1, P2, P5 to P8, P10, P11, P15, P17 Range 4.5 to 5.5 VDD - 0.3 to VDD AGND to VREF 2.0 to 5.5 2 to 25 20 to 25 -40 to +85 20 6 2 -- 1 Unit V V V V MHz C --
16/28
PEDL66517-03
1 Semiconductor
ML66517 Family
ALLOWABLE OUTPUT CURRENT
(1) ML66517/ML66Q517 (80-pin QFP)
(VDD = 4.5 to 5.5 V, Ta = -40 to +85C) Parameter "H" output pin (1 pin) "H" output pins (sum total) "L" output pin (1 pin) Pin All input pins Sum total of all output pins P3 Other ports Sum total of P0, P3 Sum total of P1, P2 "L" output pins (sum total) Sum total of P7, P8, P15 Sum total of P5, P6, P10, P11, P16, P17 Sum total of all output pins IOL -- -- 50 Symbol IOH IOH IOL Min. -- -- -- -- Typ. -- -- -- -- Max. -2 -50 10 5 60 mA Unit
100
(2) ML66Q515/ML66514 (64-pin QFP/SDIP)
(VDD = 4.5 to 5.5 V, Ta = -40 to +85C) Parameter "H" output pin (1 pin) "H" output pins (sum total) "L" output pin (1 pin) Pin All input pins Sum total of all output pins P3 Other ports Sum total of P0, P3 "L" output pins (sum total) P1 Sum total of P5 to P8, P11, P15, P17 Sum total of all output pins IOL -- -- 30 60 Symbol IOH IOH IOL Min. -- -- -- -- Typ. -- -- -- -- Max. -2 -20 10 5 50 mA Unit
Note: Each of the family devices has unique pattern routes for the internal power and ground. Connect the power supply voltage to all VDD pins and the ground potential to all GND pins. If a device may have one or more VDD or GND pins to which the power supply voltage or the ground potential is not connected, it can not be guaranteed for normal operation.
17/28
PEDL66517-03
1 Semiconductor
ML66517 Family
ELECTRICAL CHARACTERISTICS
DC Characteristics
(VDD = 4.5 to 5.5 V, Ta = -40 to +80C) Parameter "H" input voltage "H" input voltage "L" input voltage "L" input voltage "H" output voltage "H" output voltage "L" output voltage "L" output voltage "L" output voltage *1 *2 to *8 *1 *2 to *8 *1, *4, *5 VOH *2 *1, *5 *4 *2 VOL Symbol VIH VIL Condition -- -- IO = -400 A IO = -2.0 mA IO = -200 A IO = -2.0 mA IO = 3.2 mA IO = 5.0 mA IO = 3.2 mA IO = 10.0 mA IO = 1.6 mA IO = 5.0 mA IIH/IIL VI =VDD/0 V Min. 0.44 VDD 0.80 VDD -0.3 -0.3 VDD - 0.4 VDD - 0.6 VDD - 0.4 VDD - 0.6 -- -- -- -- -- -- -- -- -- ILO Rpull CI CO IREF IDDS IDDH IDD VO =VDD/0 V VI = 0 V f = 1 MHz, Ta = 25C During A/D operation When A/D is stopped ML66Q517/Q515 *9 ML66517/514 *9 f = 25 MHz, No load -- 25 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50 5 7 -- -- 20 1 30 40 Typ. -- -- -- -- Max. VDD + 0.3 VDD + 0.3 0.16 VDD 0.2 VDD -- -- -- -- 0.4 0.8 0.4 1.0 0.4 0.8 1/-1 1/-250 15/-15 10 100 -- -- 4 10 900 50 40 60 A k pF mA A A mA A V Unit
Input leakage current*3, *7 Input current Input current
*1, *2, *4, *5
*6 *8
Output leakage current Pull-up resistance Input capacitance Output capacitance Analog reference supply current Supply current (STOP mode) Supply current (HALT mode) Supply current
*1: Applicable to P0 *2: Applicable to P1, P2, P6, P7, P8, P10, P11, P15, P17 *3: Applicable to P12 *4: Applicable to P3 *5: Applicable to P16 *6: Applicable to RES *7: Applicable to EA, NMI, CLKSEL0, CLKSEL1 *8: Applicable to OSC0 *9: Ports used as inputs are at VDD or 0 V. Other ports are unloaded.
18/28
PEDL66517-03
1 Semiconductor
ML66517 Family
AC Characteristics (1) External program memory control
(VDD = 4.5 to 5.5 V, Ta = -40 to +85C) Parameter Cycle time Clock pulse width (HIGH level) Clock pulse width (LOW level) ALE pulse width PSEN pulse width PSEN pulse delay time Low address setup time Low address hold time High address setup time High address hold time Instruction setup time Instruction hold time Symbol tcyc tWH tWL tAW tPW tPAD tALS tALH tAHS tAHH tIS tIH CL = 50 pF Condition fOSC = 25 MHz Min. 40 13 13 2t - 10 2t - 18 t - 5 2t - 15 t - 13 3t - 30 -8 30 -8 Max. -- -- -- -- -- -- -- -- -- -- -- t - 3 ns Unit
Note: t = tcyc/2
tcyc CPUCLK tWH tAW tWL
ALE PSEN
tPAD
tPW
AD0 to AD7
PC0 to 7
INST0 to 7
tALS
tALH
tIS
tIH
A8 to A16 tAHS
PC8 to 16
tAHH
Bus timing during no wait cycle time
19/28
PEDL66517-03
1 Semiconductor
ML66517 Family
(2) External data memory control
(VDD = 4.5 to 5.5 V, Ta = -40 to +85C) Parameter Cycle time Clock pulse width (HIGH level) Clock pulse width (LOW level) ALE pulse width RD pulse width WR pulse width RD pulse delay time WR pulse delay time Low address setup time Low address hold time High address setup time High address hold time Read data setup time Read data hold time Write data setup time Write data hold time Symbol tcyc tWH tWL tAW tRW tWW tRAD tWAD tALS tALH tAHS tAHH tRS tRH tWS tWH
tcyc CPUCLK tWH ALE RD tRAD tRW tAW tWL
Condition fOSC = 25 MHz
Min. 40 13 13 2t - 10 2t - 18 2t - 18 t - 5 t - 5
Max. -- -- -- -- -- -- -- -- -- -- -- -- -- t - 3 -- --
Unit
CL = 50 pF
2t - 15 t - 13 3t - 30 t - 3 30 0 2t - 30 t - 3
ns
Note: t = tcyc/2
AD0 to AD7
RAP0 to 7
DIN0 to 7
tALS
tALH
tRS
tRH
A8 to A15 tAHS WR
RAP8 to 15
tAHH
tWAD
tWW
AD0 to AD7
RAP0 to 7
DOUT0 to 7
tALS
tALH
tWS
tWH
A8 to A15 tAHS
RAP8 to 15
tAHH
Bus timing during no wait cycle time
20/28
PEDL66517-03
1 Semiconductor
ML66517 Family
(3) Serial port control Master mode (Clock synchronous serial port)
(VDD = 4.5 to 5.5 V, Ta = -40 to +85C) Parameter Cycle time Serial clock cycle time Output data setup time Output data hold time Input data setup time Input data hold time Symbol tcyc tSCKC tSTMXS tSTMXH tSRMXS tSRMXH CL = 50 pF Condition fOSC = 25 MHz Min. 40 4 tcyc 2t - 5 5t - 10 13 0 Max. -- -- -- -- -- -- ns Unit
Note: t = tcyc/2
tcyc CPUCLK
TXC/RXC tSCKC SDOUT (TXD) tSTMXH SDIN (RXD) tSRMXS tSRMXH tSTMXS
21/28
PEDL66517-03
1 Semiconductor
ML66517 Family
Slave mode (Clock synchronous serial port)
(VDD = 4.5 to 5.5 V, Ta = -40 to +85C) Parameter Cycle time Serial clock cycle time Output data setup time Output data hold time Input data setup time Input data hold time Symbol tcyc tSCKC tSTMXS tSTMXH tSRMXS tSRMXH CL = 50 pF Condition fOSC = 25 MHz Min. 40 4 tcyc 2t - 15 4t - 10 13 3 Max. -- -- -- -- -- -- ns Unit
Note: t = tcyc/2
tcyc CPUCLK
TXC/RXC tSCKC SDOUT (TXD) tSTMXH SDIN (RXD) tSRMXS tSRMXH tSTMXS
Measurement points for AC timing
VDD 0V
0.8 V 0.2 V
0.8 V 0.2 V
22/28
PEDL66517-03
1 Semiconductor
ML66517 Family
A/D Converter Characteristics
(Ta = -40 to +85C, VDD = 4.5 to 5.5 V, AGND = GND = 0 V) Parameter Resolution Linearity error Differential linearity error Zero scale error Full-scale error Cross talk Conversion time Symbol n EL ED EZS EFS ECT tCONV Condition Refer to measurement circuit 1 Analog input source impedance RI 5 k tCONV = 10.7 s Refer to measurement circuit 2 Set according to ADTM set data Min. -- -- -- -- -- -- 10.7 Typ. 10 -- -- -- -- -- -- Max. -- 3 2 +3 -3 1 -- s/ch LSB Unit Bit
Reference voltage + RI 0.1 F 47 F
VREF
VDD + 0.1 F GND 47 F
+5 V
- + Analog input
AI0 to AI7 AGND CI
0V
RI (impedance of analog input source) 5 k CI 0.1 F
Measurement Circuit 1
- + Analog input
5 k AI0 AI1 0.1 F to AI7
Cross talk is the difference between the A/D conversion results when the same analog input is applied to AI0 through AI7 and the A/D conversion results of the circuit to the left.
VREF or AGND
Measurement Circuit 2
23/28
PEDL66517-03
1 Semiconductor
ML66517 Family
Definition of Terminology 1. Resolution Resolution is the value of minimum discernible analog input. With 10 bits, since 210 = 1024, resolution of (VREF - AGND) / 1024 is possible. 2. Linearity error Linearity error is the difference between ideal conversion characteristics and actual conversion characteristics of a 10-bit A/D converter (not including quantization error). Ideal conversion characteristics can be obtained by dividing the voltage between VREF and AGND into 1024 equal steps. 3. Differential linearity error Differential linearity error indicates the smoothness of conversion characteristics. Ideally, the range of analog input voltage that corresponds to 1 converted bit of digital output is 1LSB = (VREF - AGND) / 1024. Differential error is the difference between this ideal bit size and bit size of an arbitrary point in the conversion range. 4. Zero scale error Zero scale error is the difference between ideal conversion characteristics and actual conversion characteristics at the point where the digital output changes from 000H to 001H. 5. Full-scale error Full-scale error is the difference between ideal conversion characteristics and actual conversion characteristics at the point where the digital output changes from 3FEH to 3FFH.
24/28
PEDL66517-03
1 Semiconductor
ML66517 Family
PACKAGE DIMENSIONS
(Unit : mm)
QFP80-P-1420-0.80-BK
MIRROR FINISH
Package material Lead frame material Pin treatment Solder plate thicknes Package weight (g)
Epoxy resin 42 alloy Solder plating 5 m or more 1.27 TYP.
Notes for Mounting the Surface Mount Type Packages The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
25/28
PEDL66517-03
1 Semiconductor
ML66517 Family
(Unit : mm)
QFP64-P-1414-0.80-BK
MIRROR FINISH
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 m or more 0.87 TYP.
Notes for Mounting the Surface Mount Type Packages The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
26/28
PEDL66517-03
1 Semiconductor
ML66517 Family
(Unit : mm)
SDIP64-P-750-1.778
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin Cu alloy Solder plating 5 m or more 8.70 TYP.
27/28
PEDL66517-03
1 Semiconductor
ML66517 Family
NOTICE 1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. 2. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. Neither indemnity against nor license of a third party's industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party's right which may result from the use thereof. 6. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. No part of the contents contained herein may be reprinted or reproduced without our prior permission. Copyright 1999 Oki Electric Industry Co., Ltd.
28/28

▲Up To Search▲

Price & Availability of ML66517

	To Download ML66517 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .